q4.1: we add a 1 kib cache which has a hit time of 5 clock cycles; our miss penalty is still the 100 clock cycles needed to access main memory. to test this cache, we then run a program that accesses random memory addresses. to the nearest clock cycle, what does the amat converge to as the program runs indefinitely? hint: if the memory accesses are purely random, are you exploiting the spatial/temporal locality offered by caches? what happens to your miss rate?